| 摘要 |
PROBLEM TO BE SOLVED: To compare the value of two binary numbers expressed in complements with each other in a comparatively short time without increasing the capacity of hardware by inputting the code bit of the 2nd input data and the sum code bit which is outputted from an addition means and then switching and outputting selectively the sum code bit and its inverted signal. SOLUTION: A code coincidence detection circuit 12 detects the coincidence or non-coincidence between code bits (a) and (b) of both data X and Y and supplies this detection output (c) to a data inverting circuit 10 and an adder 11 respectively. The circuit 10 inverts the data Y based on the output (c), and the adder 11 adds the data X to the output (c) as well as to the output sent from the circuit 10 and outputs its addition result Z. At the same time, the code bit (d) of the result Z is supplied to a flag generation circuit 13. The circuit 13 outputs an arithmetic flag SF according to the code bit (a) of the data X and the code bit (d). |
