发明名称 CIRCUIT FOR ON DIE TERMINATION OF SEMICONDUCTOR MEMORY APPARATUS
摘要 On-die termination circuit of a semiconductor memory apparatus is provided to improve performance of the semiconductor memory apparatus by performing data input and data output normally by changing a code value used for preventing a code calibration error in correspondence to PVT(Process/Voltage/Temperature) variation. A comparison part(20,50) outputs a comparison result signal by comparing a voltage corresponding to a normal code with a reference voltage. A code calibration part(200,600) changes the normal code according to the comparison result signal, and resets the normal code as a reset code or a variable fuse code according to a reset signal. The code calibration part comprises a code setting unit and a register(400,800). The code setting unit sets a fuse code and outputs a fuse code enable signal to define the usage of the fuse code. The register counts and stores the normal code according to the comparison result signal, and resets the normal code by selecting one of the reset code or the fuse code according to the reset signal and the fuse code enable signal.
申请公布号 KR100821585(B1) 申请公布日期 2008.04.15
申请号 KR20070023867 申请日期 2007.03.12
申请人 HYNIX SEMICONDUCTOR INC. 发明人 PARK, JUNG HOON
分类号 G11C7/10;G11C5/14;G11C7/20;G11C29/04 主分类号 G11C7/10
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