发明名称 Clock generating device and related synchronization method
摘要 A clock generating device is disclosed. The clock generating device includes a clock generating unit, for counting a synchronization period of a synchronization signal, generating a first interrupt signal according to the synchronization signal, generating a pulse-width modulation signal according a control signal, counting a phase difference between the synchronization signal and the pulse-width modulation signal, and generating a second interrupt signal according to the pulse-width modulation signal; and a computing unit, for acquiring the synchronization period according to the first interrupt signal, acquiring the phase difference according to the second interrupt signal, and adjusting the control signal according to the synchronization period, a modulation period of the pulse-width modulation signal and the phase difference.
申请公布号 US9363069(B2) 申请公布日期 2016.06.07
申请号 US201514697642 申请日期 2015.04.28
申请人 NOVATEK Microelectronics Corp. 发明人 Wang Chieh-Hao;Lo Wei-Jen;Kuo Sen-Lin;Shih Pao-Chen
分类号 H03K7/08;H04L7/00;H04L25/49 主分类号 H03K7/08
代理机构 代理人 Hsu Winston;Margo Scott
主权项 1. A clock generating device, comprising: a clock generating unit, for counting a synchronization period of a synchronization signal, generating a first interrupt signal according to the synchronization signal, generating a pulse-width modulation signal according a control signal, counting a phase difference between the synchronization signal and the pulse-width modulation signal, and generating a second interrupt signal according to the pulse-width modulation signal; and a computing unit, for acquiring the synchronization period according to the first interrupt signal, acquiring the phase difference according to the second interrupt signal, and adjusting the control signal according to the synchronization period, a modulation period of the pulse-width modulation signal and the phase difference.
地址 Hsinchu Science Park, Hsin-Chu TW