发明名称 |
Methods for Fabricating Strained Gate-All-Around Semiconductor Devices by Fin Oxidation Using an Undercut Etch-Stop Layer |
摘要 |
Strained gate-all-around semiconductor devices formed on globally or locally isolated substrates are described. For example, a semiconductor device includes a semiconductor substrate. An insulating structure is disposed above the semiconductor substrate. A three-dimensional channel region is disposed above the insulating structure. Source and drain regions are disposed on either side of the three-dimensional channel region and on an epitaxial seed layer. The epitaxial seed layer is composed of a semiconductor material different from the three-dimensional channel region and disposed on the insulating structure. A gate electrode stack surrounds the three-dimensional channel region with a portion disposed on the insulating structure and laterally adjacent to the epitaxial seed layer. |
申请公布号 |
US2016284605(A9) |
申请公布日期 |
2016.09.29 |
申请号 |
US201414266643 |
申请日期 |
2014.04.30 |
申请人 |
Cappellani Annalisa;Pethe Abhijit Jayant;Ghani Tahir;Gomez Harry |
发明人 |
Cappellani Annalisa;Pethe Abhijit Jayant;Ghani Tahir;Gomez Harry |
分类号 |
H01L21/84;H01L29/423;H01L29/06;H01L29/08;H01L21/306;H01L29/66 |
主分类号 |
H01L21/84 |
代理机构 |
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代理人 |
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主权项 |
1. A method of fabricating a semiconductor device, the method comprising:
forming a three-dimensional semiconductor structure on an epitaxial seed layer disposed above a semiconductor substrate, the epitaxial seed layer comprising a semiconductor material different from the three-dimensional semiconductor structure; etching the three-dimensional semiconductor structure to provide a three-dimensional channel region and to expose portions of the epitaxial seed layer on either side of the three-dimensional channel region; forming source and drain regions on either side of the three-dimensional channel region and on the epitaxial seed layer; insulating the three-dimensional channel region and the source and drain regions from the semiconductor substrate by forming an insulating structure comprising one or more isolation pedestals continuous with the semiconductor substrate; and, subsequently, removing a portion of the epitaxial seed layer; forming a gate electrode stack at least partially surrounding the three-dimensional channel region; and forming a pair of conducting contacts, one contact at least partially surrounding the source region, and another contact at least partially surrounding the drain region. |
地址 |
Portland OR US |