| 摘要 |
PROBLEM TO BE SOLVED: To perform an optimal test for corresponding to a target value for each circuit and reduce total test time when a semiconductor integrated circuit device includes circuits having different target values of failure detection rates from each other.SOLUTION: A semiconductor integrated circuit device detects a failure by connecting a plurality of flip-flops to a plurality of scan chains, inputting an output of a pattern generation circuit to the flip-flop using the scan chain, then operating a logic circuit, extracting a value of the flip-flop changed by the operation of the logic circuit using the scan chain, and by comparing the value to an expectation value with a comparison circuit. The scan chain is composed of a plurality of scan chain groups, the output of the pattern generation circuit is inputted to a first scan chain group, and then expectation value comparison for a second scan chain group is performed a plurality of times.SELECTED DRAWING: Figure 9B |
