发明名称 FRAME SYNCHRONIZATION CIRCUIT
摘要 <p>PURPOSE:To attain pull in with a true synchronization bit by driving a timer in a timing resulting from retarding a timing of an output pulse of a self-running counter by one bit at the input of a resynchronization control signal. CONSTITUTION:When resynchronization is started, a timer drive circuit 8 starts the operation of a timer 9 at a time delayed by one bit from a bit location for a synchronization object used so far. A preceding pseudo synchronization bit location is not selected after lapse of a prescribed check time because the location reaches a final location and other synchronization object is selected. Even if the object is discriminated to be a pseudo object, since the timer 9 is started with a delay by one bit similarly, the pseudo object is thrown away at a succeeding synchronization resulting that a true synchronization bit is selected. Thus, the synchronization by using the true synchronization bit is attained and the complete data transparency is warranted.</p>
申请公布号 JPH0410821(A) 申请公布日期 1992.01.16
申请号 JP19900113625 申请日期 1990.04.27
申请人 NEC ENG LTD 发明人 ONO MASAHIKO
分类号 H04J3/06;H04L7/08 主分类号 H04J3/06
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