发明名称 Automatic LSI testing apparatus using expert system
摘要 An automatic testing apparatus includes an expert rule which is derived from expert knowledge and defines a tree of successively traceable nodes interconnected by decision branches which lead to a plurality of fault modes. Each of the nodes defines a particular test pattern and a corresponding expected value. One of the nodes is specified and a test pattern defined by the specified node is applied to an LSI chip under test and a result signal is derived therefrom. This result signal is compared with the expected value defined by the specified node to produce a comparison result. The tree of the expert rule is traced from the specified node to a subsequent node according to the comparison result and the subsequent node is specified instead of the previously specified node. The process is repeated as the tree is traced from one node to another until one of the fault modes is reached to identify a chip failure.
申请公布号 US5511162(A) 申请公布日期 1996.04.23
申请号 US19930082289 申请日期 1993.06.24
申请人 NEC CORPORATION 发明人 HAMADA, HIROYUKI;TSUJIDE, TOHRU;SUGIMOTO, MASAAKI
分类号 G01R31/26;G01R31/28;G06F11/25;G11C29/00;G11C29/44;G11C29/56;H01L21/66;(IPC1-7):G01R31/28;G06F11/00 主分类号 G01R31/26
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