Methods for temporary bussing of semiconductor package substrates

摘要

Methods for temporary bussing of semiconductor package substrates are disclosed and may include metal plating regions of a packaging substrate utilizing a plurality of bussed traces, which may be decoupled by forming debuss holes at intersections of the bussed traces. The decoupled traces may then be electrically tested, and the packaging substrate may be singulated into a plurality of substrates utilizing a sawing process through singulation areas in the packaging substrate. The traces may be electrically coupled via plating bars in the substrate. The plating bars may be located in the singulation areas. The intersections of the bussed traces may be in a Y pattern, which may be repeated along the singulation areas. The debuss holes may be formed utilizing mechanical drilling or lasing. The regions of the packaging substrate may be metal plated utilizing an electroplating process. The plurality of bussed traces may be biased for the electroplating process.

主权项

1. A method for semiconductor packaging, the method comprising:
metal plating regions of a packaging substrate utilizing a plurality of bussed traces of said packaging substrate; and decoupling the bussed traces after said metal plating by mechanically drilling individual debuss holes through intersections of said bussed traces and said packaging substrate prior to any elongate cutting extending along saw streets of the packaging substrate.