发明名称 Multilevel memory stack structure with joint electrode having a collar portion and methods for manufacturing the same
摘要 A three-dimensional memory device including multiple stack structures can be formed with a joint region electrode, which is an electrode formed at a joint region located near the interface between an upper stack structure and a lower stack structure. A memory stack structure is formed through the multiple stack structures. The joint region electrode laterally surrounds a portion of the memory stack structure in proximity to the interface between different stack structures. The joint region electrode includes a layer portion having a thickness and a collar portion that laterally surrounds the memory stack structure and having a greater vertical extent than the thickness of the layer portion. The increased vertical extent of the collar portion with respect to the vertical extent of the layer portion provides enhanced control of a portion of a semiconductor channel in the memory stack structure located near the interface between different stack structures.
申请公布号 US9530791(B1) 申请公布日期 2016.12.27
申请号 US201514883966 申请日期 2015.10.15
申请人 SANDISK TECHNOLOGIES LLC 发明人 Zhang Yanli;Makala Raghuveer S.;Liu Jin;Chowdhury Murshed;Lee Yao-Sheng;Alsmeier Johann
分类号 H01L27/115 主分类号 H01L27/115
代理机构 The Marbury Law Group PLLC 代理人 The Marbury Law Group PLLC
主权项 1. A monolithic three-dimensional memory device comprising: a lower stack structure comprising a first alternating stack including first insulating layers and first electrically conductive control gate layers and located over a substrate; an upper stack structure comprising a second alternating stack including second insulating layers and second electrically conductive control gate layers and located over the lower stack structure; a memory stack structure extending through the lower stack structure and the upper stack structure; and an electrode overlying the first electrically conductive layers and underlying the second electrically conductive layers, and comprising a layer portion having a thickness and a collar portion that laterally surrounds the memory stack structure and having a greater vertical extent than the thickness of the layer portion.
地址 Plano TX US
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