| 摘要 |
PURPOSE:To improve the accuracy of positioning in a mask process in the manufacture of a power MOSFET. CONSTITUTION:A gate insulating film 16 and gate electrodes 17 are formed on the surface of a one conductivity type semiconductor substrate 11. An opposite conductivity type diffused region layer 14 is formed with the gate electrodes 17 as masks. An etching resist film 13A is selectively formed on the center region of the diffused region layer 14 surface and impurity ions are implanted with the etching resist film 13A as a mask to form one conductivity type source region layers 15 in the diffused region layer 14. A flattening film 13B is formed over the whole surface and, after the etching resist film 13A is exposed, the etching resist film 13A is removed to form an aperture 13C in the flattening film 13B and opposite conductivity type impurities are implanted into the diffused region layer 14 with the flattening film 13B as a mask. |
