发明名称 |
CIRCUIT FOR DETECTING DIGITAL SYNCHRONOUS SIGNAL |
摘要 |
PURPOSE:To change the error permissible value of a pattern comparing part in accordance with an S/N by preparing plural pattern data having different error allowable bits and selecting the pattern data by the output of an automatic gain control voltage detecting circuit. CONSTITUTION:A digital intermediate frequency signal applied to an input terminal 11 is inputted to a demodulator 12 and an AGC voltage detecting circuit 15. The output of the demodulator 12 is applied to the shift register 13 of R bits, where it is converted into parallel data and is inputted to a pattern comparing part 14. It has a ROM of RX(L+1) bits, and prepares previously plural pattern data for permitting errors with respect to the address input of R bits. Any one of them is selected by a switch 16 in accordance with the output of the AGC voltage detecting circuit 15, and the error permissible bit is decided.
|
申请公布号 |
JPS61220578(A) |
申请公布日期 |
1986.09.30 |
申请号 |
JP19850062336 |
申请日期 |
1985.03.27 |
申请人 |
TOSHIBA CORP;TOSHIBA AUDIO VIDEO ENG CORP |
发明人 |
SAKURAI MASARU;IKEGAMI KIYOSHI |
分类号 |
H04N5/08;H04B7/185;H04N5/04;H04N7/20 |
主分类号 |
H04N5/08 |
代理机构 |
|
代理人 |
|
主权项 |
|
地址 |
|