MEMORY DEVICE AND MEMORY SYSTEM HAVING THE SAME

摘要

A memory device includes a power-up control circuit, first to n^th boosting voltage generators, first to n^th switches, and a memory block. The power-up control circuit sequentially first to n^th power-up signals when a power supply voltage is received in an early power-up stage. Each of the first to n^th boosting voltage generators generates an internal boosting voltage based on an external boosting voltage. The first to n^th switches are sequentially turned on in response to the first to n^th power-up signals to sequentially provide the external boosting voltage to the first to n^th boosting voltage generators. The memory block performs a reading operation and a writing operation based on the internal boosting voltage. The power-up control circuit sequentially activates the first to n^th power-up signals on a first cycle in response to an increase in the power supply voltage and, when a reset signal transits to a logical high level before the first to n^th power-up signals are all activated, changes an activation cycle of the first to n^th power-up signals to a second cycle shorter than the first cycle. Thus, the amount of current consumed during power-up can be temporarily dispersed.