Semiconductor light emitting device, manufacturing method thereof, and semiconductor light emitting device package using the same

摘要

There is provided a semiconductor light emitting device comprising a semiconductor stack having first and second main surfaces opposing each other, and comprising first and second conductivity-type semiconductor layers respectively defining the first and second main surfaces, and an active layer interposed between the first and second conductivity-type semiconductor layers; a plurality of contact holes penetrating the second conductivity-type semiconductor layer and the active layer, and one region of the first conductivity-type semiconductor layer; a first electrode layer disposed on the second main surface of the semiconductor stack, the first electrode layer extending and being connected to the one region of the first conductivity-type semiconductor layer through the contact holes; a second electrode layer disposed between the semiconductor stack and the first electrode layer and connected to the second conductivity-type semiconductor layer; and first and second interconnected bumps.

主权项

1. A semiconductor light emitting device comprising:
a semiconductor stack having first and second main surfaces opposing each other, and comprising first and second conductivity-type semiconductor layers respectively defining the first and second main surfaces, and an active layer interposed between the first and second conductivity-type semiconductor layers; a plurality of contact holes penetrating the second conductivity-type semiconductor layer and the active layer; a first electrode layer disposed on the second main surface of the semiconductor stack, the first electrode layer extending and being connected to one region of the first conductivity-type semiconductor layer through the contact holes; a second electrode layer disposed between the semiconductor stack and the first electrode layer and connected to the second conductivity-type semiconductor layer; and first and second interconnected bumps comprising:
first and second under bump metallurgy (UBM) layers respectively connected to the first and second electrode layers;first and second intermetallic compound (IMC) layers respectively disposed on the first and the second UBM layers;first and second solder bumps respectively disposed on the first and second IMC layers, wherein the solder bumps are bonded to the UBM layers by the IMC layers; and first and second barrier layers covering lateral surfaces of the first and second UBM layers respectively, wherein the first and second interconnected bumps are disposed opposite to the first main surface.