Sensing of non-volatile memory cell having two complementary memory transistors

摘要

Voltage is increased on a wordline signal. The wordline signal is applied to a programmed FET and an unprogrammed FET of a memory cell. The programmed FET has a higher threshold voltage than the unprogrammed FET. The programmed FET is connected to a first bitline and the unprogrammed FET is connected to a second bitline. It is determined that the second bitline has reached a threshold voltage. In response to determining the second bitline has reached the threshold voltage, the first bitline is pulled towards ground. A signal is output based on a low voltage of the first bitline and a high voltage of the second bitline.

主权项

1. A method comprising:
increasing a first voltage of a first wordline signal, the first wordline signal applied to a first programmed FET and a first unprogrammed FET of a first memory cell, the first programmed FET having a higher threshold voltage than the first unprogrammed FET, the first programmed FET connected to a first bitline and the first unprogrammed FET connected to a second bitline, the first bitline connected to a first NFET, a first PFET, and a first inverter, the second bitline connected to a second NFET, a second PFET, and a second inverter; determining, by the first NFET, the second bitline has reached a first threshold voltage; in response to the determining the second bitline has reached the first threshold voltage, pulling, by the first NFET, the first bitline towards ground; determining, by the second PFET, an output from the second inverter has reached a second threshold voltage; in response to the determining the output from the second inverter has reached the second threshold voltage, pulling, by the second PFET, the second bitline toward a supply voltage; and outputting a first signal based on a low voltage of the first bitline and a high voltage of the second bitline.