发明名称 LVDS and subLVDS driver circuit
摘要 A driver circuit configured to produce a pair of output signals from a pair of input signals.;The proposed solution brings improvements over conventional LVDS and subLVDS driver circuits because it enables the use of a single driver circuit (also known as “buffer”) which is compliant with both LVDS and subLVDS transmission standards. This allows flexibility with MCUs for instance the automotive industry. Further, proposed solution has the advantage of saving die size in comparison to a solution where two buffers would have been used for different transmission standards. Further, high speed transmission rate is maintained since transmission is performed for one standard at the time.;An integrated circuit, a printed circuit and a data processing circuit are also claimed.
申请公布号 US9509310(B1) 申请公布日期 2016.11.29
申请号 US201615053673 申请日期 2016.02.25
申请人 Freescale Semiconductor, Inc. 发明人 Goumballa Birama;Pavao-Moreira Cristian;Salle Didier
分类号 H03B1/00;H03K3/00;H03K19/0185;H04B1/04 主分类号 H03B1/00
代理机构 代理人
主权项 1. A driver circuit configured to produce a pair of output signals from a pair of input signals, the driver circuit comprising: a current source connected between a first node and a supply terminal, and operative to supply a driving current to the first node; a first switch connected in parallel with the current source between a second node and a voltage regulator operative to supply a DC regulated operating voltage to a terminal of the first switch; a differential switching circuit connected between the first node, the second node, a third node and a fourth node, and operative to receive the pair of input signals at a first input node and at a second input node, and convert the pair of input signals to the pair of output signals at a first output node and at a second output node; a voltage divider coupled between the first output node and the second output node, having a first transmission gate switch and a second transmission gate switch serially connected through a fifth node of the voltage divider; a common-mode-feedback circuit coupled to the fifth node, and operative to generate a common mode control signal in response to a reference voltage and a level of voltage at the fifth node; a common mode resistance unit coupled between the third node and a ground terminal, and having a resistance value controlled by the common mode control signal; a second switch coupled in parallel with the common mode resistance unit between the fourth node and the ground terminal; a digital controller coupled to the current source, the voltage regulator, the voltage divider, the first switch and the second switch; wherein the driver circuit is operative to select between: a) a first mode of operation in which input signals and output signals are differential signals and in which current is conducted from the current source to the ground terminal, passing through the fifth node, and b) a second mode of operation in which input signals and output signals are single-ended signals and in which output voltages are generated between the voltage regulator and the ground terminal.
地址 Austin TX US