Temperature compensated reverse current for memory

摘要

One aspect of the technology is a memory device comprising a memory array, a sense circuit, and temperature compensated bias circuitry. The memory array is electrically coupled between a bit line bias circuit and a common source line. The bit line bias circuit generates a temperature compensated sense current through the memory array. The temperature compensated bias circuitry controls the bit line bias circuit to generate the temperature compensated sense current through the memory array.

主权项

1. A memory device, comprising:
a memory array including a bit line and a source line, memory cells in the array electrically coupled between the bit line and the source line; a source line bias circuit connected to the source line to apply a voltage higher than a voltage on the bit line in a read operation; a bit line bias circuit connected to the bit line, generating a temperature compensated sense current for the read operation on the bit line through a selected memory cell from the source line; temperature compensated bias circuitry which provides a temperature dependent voltage to the bit line bias circuit to offset variations in current on the bit line due to temperature; and a sense amplifier coupled to the bit line.