发明名称 Lead frame and package substrate, and package using the same
摘要 <p>In a bonding configuration for a semiconductor device package, the bonding angles of the bonding wires are maintained within acceptable limits, without causing an increase in the chip die size, and without necessitating the use of the corner rule. In this manner, the occurrence of shorting between adjacent bonding wires can be mitigated or eliminated, and device net die count during fabrication can be increased.</p>
申请公布号 KR100642748(B1) 申请公布日期 2006.11.10
申请号 KR20040058070 申请日期 2004.07.24
申请人 发明人
分类号 H01L23/495 主分类号 H01L23/495
代理机构 代理人
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