| 摘要 |
A method and apparatus for performing, after frequency acquisition, phase acquisition and phase maintenance in a digital phase-locked loop 10. A phase detector (12), determines the phase relation of an oscillator output to a reference clock signal, and provides a control signal to a controller (13), indicative thereof. When a subsequent logic state of the control signal provided by the phase detector is equal to an initial logic state of the control signal, the controller (13) increments or decrements a control value initially corresponding to a baseline frequency of the oscillator by the gain value, based upon the logic state of the control signal. When the control signal changes state, phase-lock has been acquired, and a gain value which determines the magnitude of change of the oscillator frequency is decreased. On every subsequent change in the logic state of the control signal, the gain value is decreased, unless at a minimum. If the control signal does not change for a predefined number of cycles, the gain value is increased.
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