发明名称 |
Reduced stress isolation for SOI devices and a method for fabricating |
摘要 |
<p>A method for forming an isolation structure (22) on a SOI substrate (11) is provided. A three layer stack of an etchant barrier layer (16), a stress relief layer (17), and an oxide mask layer (18) is formed on the SOI substrate (11). The three layer stack is patterned and etched to expose portions of the etchant barrier layer (16). The silicon layer (13) below the exposed portions of the etchant barrier layer (16) is oxidized to form the isolation structure (22). The isolation structure (22) comprises a bird's head region (21) with a small encroachment which results in higher edge threshold voltage. The method requires minimum over-oxidation and provides for an isolation structure (22) that leaves the SOI substrate (11) planar. Minimal over-oxidation reduces the number of dislocations formed during the oxidation process and improves the source to drain leakage of the device. <IMAGE></p> |
申请公布号 |
EP0756319(A2) |
申请公布日期 |
1997.01.29 |
申请号 |
EP19960111564 |
申请日期 |
1996.07.18 |
申请人 |
MOTOROLA, INC. |
发明人 |
RACANELLI, MARCO;SHIN, HYUNGCHEOL;PARK, HEEMYONG |
分类号 |
H01L21/316;H01L21/32;H01L21/76;H01L21/762;H01L27/12;(IPC1-7):H01L21/762 |
主分类号 |
H01L21/316 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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