| 摘要 |
<p>An image acquisition method and apparatus uses timing logic that permits selective readout of portions of an image stored in a charge coupled device (CCD). That logic selectively skips portions of the image not of interest, e.g., by applying a succession of 'vertical' clocking signals to the CCD, causing it to transfer lines of image data to a readout register. No or few 'horizontal' clocking signals are applied in connection with the line-skipping operation, thereby, reducing or eliminating time otherwise occupied outputting unwanted pixels from the readout register. The timing logic also selectively generates a 'conventional' sequence of interspersed horizontal and vertical clocking signals, causing the CCD to output pixels from lines of the image of interest.</p> |
