发明名称 |
Semiconductor memory device for fast access |
摘要 |
Rapid data transfer and reduction in power consumption can be achieved by reducing the number of row accesses. A pattern of the memory regions to be selected in memory array is changed by word line mode designation of word line mode control circuit. Memory cells in the same row are selected in a line mode, whereas memory cells in different rows are simultaneously selected in a box mode.
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申请公布号 |
US2001038567(A1) |
申请公布日期 |
2001.11.08 |
申请号 |
US20010800785 |
申请日期 |
2001.03.08 |
申请人 |
MITSUBISHI DENKI KABUSHIKI KAISHA |
发明人 |
ISHIKAWA MASATOSHI |
分类号 |
G11C11/407;G11C8/00;G11C8/12;G11C8/14;G11C11/401;(IPC1-7):G11C8/00 |
主分类号 |
G11C11/407 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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