发明名称 |
Semiconductor memory devices having increased distance between gate electrodes and epitaxial patterns and methods of fabricating the same |
摘要 |
A semiconductor memory device is provided including a substrate, a plurality of interlayer insulating layers and gate electrodes alternately stacked on the substrate. The plurality of interlayer insulating layers and the gate electrodes define a channel hole that vertically penetrates the plurality of interlayer insulating layers and the gate electrodes to expose at least a portion of the substrate. A channel recess is provided in the substrate exposed by the channel hole. An epitaxial pattern fills the channel recess. The epitaxial pattern has an upper surface that is concave and curves inward in a middle portion thereof. |
申请公布号 |
US9379134(B2) |
申请公布日期 |
2016.06.28 |
申请号 |
US201514875840 |
申请日期 |
2015.10.06 |
申请人 |
Samsung Electronics Co., Ltd. |
发明人 |
Lee Joonsuk;Lee Woosung;Lee Woong |
分类号 |
H01L27/115 |
主分类号 |
H01L27/115 |
代理机构 |
Myers Bigel & Sibley, P.A. |
代理人 |
Myers Bigel & Sibley, P.A. |
主权项 |
1. A semiconductor memory device, comprising:
a substrate; a plurality of interlayer insulating layers and gate electrodes alternately stacked on the substrate, the plurality of interlayer insulating layers and the gate electrodes defining a channel hole that vertically penetrates the plurality of interlayer insulating layers and the gate electrodes to expose at least a portion of the substrate; a channel recess in the substrate exposed by the channel hole; and an epitaxial pattern filling the channel recess, wherein the epitaxial pattern has an upper surface that is concave and curves inward in a middle portion thereof. |
地址 |
KR |