发明名称 MODIFYING IMPLANT REGIONS IN AN INTEGRATED CIRCUIT TO MEET MINIMUM WIDTH DESIGN RULES
摘要 A computer-implemented method for designing an integrated circuit includes determining a timing slack associated with a first cell of the integrated circuit that is physically adjacent to a second cell of the integrated circuit, the second cell including an implant region that is in violation of an implant width design rule associated with the integrated circuit, determining that the timing slack is greater than a change in timing slack associated with expanding the implant region into the first cell, and, in response, expanding the implant region from first cell into the second cell to form a larger implant region.
申请公布号 US2016371421(A1) 申请公布日期 2016.12.22
申请号 US201514744016 申请日期 2015.06.18
申请人 NVIDIA CORPORATION 发明人 BROWN David Lyndell;PRATTY Sreedhar
分类号 G06F17/50 主分类号 G06F17/50
代理机构 代理人
主权项 1. A non-transitory computer-readable medium storing instructions for causing a computing device to control a fabrication process for a semiconductor device by performing the steps of: determining a timing slack associated with a first cell of the integrated circuit, the first cell including an implant region that is in violation of an implant width design rule associated with the integrated circuit; determining that the timing slack is greater than a change in timing slack associated with removing the implant region from the first cell; and in response, removing the implant region from the first cell.
地址 Santa Clara CA US