| 摘要 |
The present invention provides a data processing device that is characterized by being provided with: a memory; and a first CPU and a second CPU, each CPU comprising an instruction processing unit for processing an instruction, a cache for storing part of data that are stored in the memory, an error detection unit for detecting errors in the data stored in the cache, and an error correction unit which, on the basis of the data stored in the cache and an error-related notification, corrects the data stored in the cache, and outputs the corrected data to the instruction processing unit; wherein the error correction unit of the first CPU receives the data stored in the cache of the first CPU, an error-related notification originating in the first CPU, the data stored in the cache of the second CPU, and an error-related notification originating in the second CPU, and if the error-related notification originating in the first CPU indicates an error and the error-related notification originating in the second CPU does not indicate an error, then the error correction unit of the first CPU outputs the data stored in the cache of the second CPU to the instruction processing unit of the first CPU; otherwise the error correction unit of the first CPU outputs the data stored in the cache of the first CPU to the instruction processing unit of the first CPU. |
