Output matching network having a single combined series and shunt capacitor component

摘要

A matching network requiring a predetermined shunt capacitance in a transformation of the impedance at the output to a transistor to a load. The matching network includes a vertically stacked shunt capacitor, for providing the entire predetermined capacitance, and a series DC blocking capacitor.

主权项

1. A structure, comprising:
(A) an integrated circuit chip substrate; (B) a transistor formed in a semiconductor layer disposed in a first portion of a top surface of the substrate, the transistor having an output for producing a microwave frequency signal, the output being coupled to a DC voltage source; (C) a ground plane conductor disposed on a bottom surface of the substrate; (D) a matching network coupled between the output of the transistor and a load, the matching network, comprising:
(i) an input transmission line coupled to the output of the transistor, the input transmission line comprising:
(a) an input strip conductor disposed on a second portion of the top surface of the substrate;(b) a first portion of the ground plane conductor disposed under the input strip conductor; and(c) a portion of the substrate disposed between the input strip conductor and the first portion of the ground plane conductor;(ii) an output transmission line coupled to the load, the output transmission line comprising:
(a) an output strip conductor disposed on a third portion the top surface of the substrate;(b) a second portion of the ground plane conductor disposed under the output strip conductor; and(c) a portion of the substrate disposed between the output strip conductor and the second portion of the ground plane conductor;(iii) a first conductive layer disposed on a third portion of the top surface of the substrate and connected to the output strip conductor of the output transmission line;(iv) a dielectric layer disposed on the first conductive layer;(v) a second conductive layer disposed on the dielectric layer and connected to the input strip conductor of the input transmission line;(vi) wherein the first conductive layer, the dielectric layer and the second conductive layer form a first capacitor, the first capacitor being disposed on the third portion of the top surface of the substrate;(vii) wherein the first conductive layer, an underlying portion of the substrate, and an underlying third portion of the ground plane conductor form a second capacitor;(viii) wherein the second capacitor provides a shunt capacitance for the matching network; and(ix) wherein the first capacitor provides a series capacitance between the input transmission line and the output transmission line to block direct current from passing from the DC voltage source to load.