发明名称 SEMICONDUCTOR DEVICES INCLUDING A CAPPING LAYER
摘要 Methods of forming a semiconductor device are provided. A method of forming a semiconductor device may include forming a capping layer on a metal pattern and on an adjacent portion of an insulating layer, the capping layer comprising a first etch selectivity, with respect to the insulating layer, on the metal pattern and a second etch selectivity, with respect to the insulating layer, on the portion of the insulating layer. Moreover, the method may include forming a recess region adjacent the metal pattern by removing the capping layer from the portion of the insulating layer. At least a portion of the capping layer may remain on an uppermost surface of the metal pattern after removing the capping layer from the portion of the insulating layer. Related semiconductor devices are also provided.
申请公布号 US2016293547(A1) 申请公布日期 2016.10.06
申请号 US201615155539 申请日期 2016.05.16
申请人 Samsung Electronics Co., Ltd. 发明人 Rha Sangho;Baek Jongmin;You Wookyung;Ahn Sanghoon;Lee Nae-In
分类号 H01L23/528;H01L23/522;H01L21/321;H01L21/02;H01L21/288;H01L23/532;H01L21/768 主分类号 H01L23/528
代理机构 代理人
主权项 1. A semiconductor device comprising: a plurality of lower metal lines spaced apart by a first distance to provide respective lower spaces between directly adjacent ones of the lower metal lines on a lower dielectric layer; a plurality of lower voids, respective ones of which are located in the respective lower spaces, wherein each of the lower voids has a first maximum width; a plurality of upper metal lines spaced apart by a second distance to provide respective upper spaces between directly adjacent ones of the upper metal lines on the plurality of lower metal lines; and a plurality of upper voids, respective ones of which are located in the respective upper spaces, wherein each of the upper voids has a second maximum width that is different from the first maximum width.
地址 Suwon-si KR