发明名称 EMBEDDED COMPONENT SUBSTRATE AND SEMICONDUCTOR MODULE
摘要 An embedded component substrate includes: a core layer; a first electrode provided on a top surface of the core layer with a first insulating layer therebetween; and a second electrode provided on a bottom surface of the core layer with a second insulating layer therebetween, wherein a cavity is formed in the embedded component substrate from a top surface thereof to expose the second insulating layer at a bottom of the cavity, wherein a placement region is defined on the bottom of the cavity, for accommodating an electronic component; and wherein the embedded component substrate further includes a pad electrode on a portion of the second insulating layer, exposed by the cavity, surrounding the placement region located on the bottom of the cavity, the pad electrode vertically protruding from a top surface of the exposed second insulating layer upwardly and being configured to electrically connect to the electronic component.
申请公布号 US2016293537(A1) 申请公布日期 2016.10.06
申请号 US201615078793 申请日期 2016.03.23
申请人 TAIYO YUDEN CO., LTD. 发明人 SUGIYAMA Yuichi;MIYAZAKI Masashi;HATA Yutaka;KATAKAI Masashi
分类号 H01L23/498;H01L21/56 主分类号 H01L23/498
代理机构 代理人
主权项 1. An embedded component substrate, comprising: a core layer; a first electrode provided on a top surface of the core layer with a first insulating layer interposed therebetween; and a second electrode provided on a bottom surface of the core layer with a second insulating layer interposed therebetween, wherein a cavity is formed in the embedded component substrate from a top surface thereof to expose the second insulating layer at a bottom of the cavity, wherein a placement region is defined on the bottom of the cavity, for accommodating an electronic component; and wherein the embedded component substrate further comprises a pad electrode on a portion of the second insulating layer, exposed by the cavity, surrounding the placement region located on the bottom of the cavity, the pad electrode vertically protruding from a top surface of the exposed second insulating layer upwardly and being configured to electrically connect to the electronic component.
地址 Tokyo JP
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