发明名称 |
Low consumption linear voltage regulator with high supply line rejection |
摘要 |
<p>A linear type of voltage regulator, having an input terminal (VBAT) adapted to receive a supply voltage thereon, and an output terminal (VOUT) adapted to deliver a regulated output voltage, comprises a power transistor (M1) and a driving circuit therefor; the driving circuit basically comprises an operational amplifier (OP) having a differential input stage biased by a bias current (Iop) which varies proportionally with the output current (Iload) of the regulator. <IMAGE></p> |
申请公布号 |
EP0899643(A1) |
申请公布日期 |
1999.03.03 |
申请号 |
EP19970830434 |
申请日期 |
1997.08.29 |
申请人 |
STMICROELECTRONICS S.R.L. |
发明人 |
CAPICI, SALVATORE VINCENZO;MILAZZO, PATRIZIA;PULVIRENTI, FRANCESCO |
分类号 |
G05F1/565;(IPC1-7):G05F1/565 |
主分类号 |
G05F1/565 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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