发明名称 Clock monitor and system on chip including the same
摘要 A system on chip includes a plurality of function blocks configured to perform predetermined functions, respectively, a clock control unit configured to generate a plurality of operating clock signals that are provided to the plurality of function blocks, respectively, a clock monitor configured to monitor frequencies of the operating clock signals to generate an interrupt signal, and a processor configured to control the frequencies of the operating clock signals based on the interrupt signal. The clock monitor includes a selector configured to select one of the operating clock signals to provide a selected clock signal, a frequency detector configured to detect a frequency of the selected clock signal to provide a detection frequency, and an interrupt generator configured to generate the interrupt signal based on the detection frequency, where the interrupt signal indicates a frequency abnormality of the operating clock signal corresponding to the selected clock signal.
申请公布号 US9391615(B2) 申请公布日期 2016.07.12
申请号 US201514692771 申请日期 2015.04.22
申请人 Samsung Electronics Co., Ltd. 发明人 Shin Dong-Suk;Ahn Ji-Yong;Lee Jang-Hyeon
分类号 G01R23/02;H03K19/00;H03K5/19;H03L7/18 主分类号 G01R23/02
代理机构 Volentine & Whitt, PLLC 代理人 Volentine & Whitt, PLLC
主权项 1. A clock monitor comprising: a selector configured to select one of a plurality of operating clock signals to provide a selected clock signal, the plurality of operating clock signals being provided to a plurality of function blocks, respectively; a frequency detector configured to detect a frequency of the selected clock signal to provide a detection frequency; and an interrupt generator configured to generate an interrupt signal based on the detection frequency, the interrupt signal indicating a frequency abnormality of the operating clock signal corresponding to the selected clock signal.
地址 Suwon-si, Gyeonggi-do KR