Display With Driver Circuitry Having Intraframe Pause Capabilities

摘要

A display may have an array of pixels controlled by display driver circuitry. Gate driver circuitry supplies gate line signals to rows of the pixels. The gate driver circuitry may include blocks of gate driver circuits each having an output coupled to a respective one of the gate lines. The gate driver circuits of each block are coupled in a chain to form a shift register. Each block has a local block-level gate start pulse generator. The display driver circuitry has a display driver circuit that supplies a gate start pulse clock to each of the local block-level gate start pulse generators. The local block-level gate start pulse generators create gate start pulses that are applied to the first gate driver circuit in each shift register. The display driver circuit may delay the gate start pulse clock when it is desired to implement an intraframe pause.

主权项

1. A display, comprising:
an array of pixels; and display driver circuitry having a display driver circuit that provides data signals to columns of the pixels and having gate driver circuitry that provides gate line signals to rows of the pixels, wherein the gate driver circuitry includes a plurality of blocks of gate driver circuits and, for each of the blocks, includes an associated local block-level gate start pulse generator.