发明名称 |
SCALABLE DIMENSIONLESS ARRAY |
摘要 |
2148719 9410638 PCTABS00032 A processing element for use in a scalable array processor chip which can perform a number of point matrix operations for conformable matrices of arbitrary order on an array of fixed size. The processing element includes a number of input and output registers, storage registers, a shifter/normaliser, and arithmetic unit (datapath elements) and a control sequencing unit. The datapath elements are connected by a number of parallel data buses, with the input and output registers connected by serial interfaces.
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申请公布号 |
CA2148719(A1) |
申请公布日期 |
1994.05.11 |
申请号 |
CA19932148719 |
申请日期 |
1993.11.05 |
申请人 |
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发明人 |
MARWOOD, WARREN;CLARKE, ALLEN PATRICK;CLARKE, ROBERT JOHN |
分类号 |
G06F9/38;G06F15/80;(IPC1-7):G06F17/16 |
主分类号 |
G06F9/38 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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