POWER SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SAME

摘要

PROBLEM TO BE SOLVED: To provide an element structure which can realize a MOS FET having a low ON resistance and a high breakdown voltage. SOLUTION: In the power semiconductor device comprising a gate electrode 11 buried in a groove via a gate insulating film, a p-type depletion region enlargement layer 4 is provided between two n-type drift layers 3 and 5, and the groove is formed to reach the n-type drift layer 3. An n-type converted region the conduction type of which is converted to an n-type is formed in a region in the vicinity of the groove of the p type depletion region enlargement layer, thus forming a carrier path. COPYRIGHT: (C)2005,JPO&NCIPI