发明名称 HARDWARE ACCELERATION SYSTEM FOR FUNCTIONAL SIMULATION
摘要 PROBLEM TO BE SOLVED: To provide a hardware acceleration system for achieving low cost, high performance, low turn-around time, and high scalability. SOLUTION: A hardware acceleration system for functional simulation comprises a generic circuit board, including logic chips, and a memory. The circuit board is capable of plugging onto a computing device. This system is adapted to allow the computing device to direct DMA transfers between the circuit board and a memory associated with the computing device. The circuit board is further capable of being configured by using simulation processors 2 and 6. The simulation processors are capable of being programmed for at least one circuit design. COPYRIGHT: (C)2007,JPO&INPIT
申请公布号 JP2006268873(A) 申请公布日期 2006.10.05
申请号 JP20060129698 申请日期 2006.05.08
申请人 LIGA SYSTEMS INC 发明人 CADAMBI SRIHARI;ASHAR PRANAV
分类号 G06F17/50;G06F9/455 主分类号 G06F17/50
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