发明名称 Method and system for fault containment
摘要 Embodiments relate to systems and methods for error containment in a system comprising detecting an error by processing an input signal by multiple processing units, and delaying at least one output signal of a processing unit to enable, in case an error has been detected, modifying at least one output signal of the processing unit that would cause propagation of the error through the system.
申请公布号 US9417946(B2) 申请公布日期 2016.08.16
申请号 US201414337699 申请日期 2014.07.22
申请人 Infineon Technologies AG 发明人 Vilela Antonio;Roger Andre
分类号 G06F11/07;G06F11/16 主分类号 G06F11/07
代理机构 Eschweiler & Associates, LLC 代理人 Eschweiler & Associates, LLC
主权项 1. A system in a multi-central processing unit (CPU) system, comprising: a first CPU; at least one second CPU, wherein the at least one second CPU is configured to operate in delayed lockstep configuration with the first CPU; a delay unit configured to expose at least one output signal from the first CPU to a delay; a comparator configured to detect an error by comparing the at least one output signal from the first CPU delayed by the delay unit with at least one output signal from the at least one second CPU; and an error blocking unit coupled to the delay unit and the comparator, wherein the error blocking unit receives the at least one output signal delayed by the delay unit and an error signal from the comparator having a state indicative of whether an error was detected by the comparator in the processing of the at least one output signal in the first CPU, and wherein the error blocking unit is configured to block or modify a propagation of the at least one output signal from the first CPU if the error signal indicates an error.
地址 Neubiberg DE
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