发明名称 Sampler load balancing
摘要 Embodiments described herein include a graphics processing unit. The graphics processing unit includes a plurality of execution units. The graphics processing unit also includes a plurality of sampler units. Each sampler unit corresponds to a sampler dispatch logic unit and at least one execution unit, and the sampler dispatch logic units are used to network the plurality of sampler units.
申请公布号 US9489707(B2) 申请公布日期 2016.11.08
申请号 US201314039135 申请日期 2013.09.27
申请人 Intel Corporation 发明人 Nalluri Hema Chand;Chandra Joy;Chatterjee Prosun;Pletcher Benjamin;Harel Yoav;Spangler Steven
分类号 G06F13/14;G06F15/00;G06T1/00;G06T1/20;G06F3/00;G06F9/50 主分类号 G06F13/14
代理机构 International IP Law Group, P.L.L.C. 代理人 International IP Law Group, P.L.L.C.
主权项 1. A graphics processing unit, comprising: a plurality of execution units; and a plurality of sampler units, each sampler unit coupled to each of the plurality of execution units through one or more sampler dispatch logic (SDL) units, wherein the one or more SDL units are used to network the plurality of sampler units as a resource pool to each of the plurality of execution units, and wherein at least one of the one or more SDL units is to calculate an estimate of a number of sample instructions to be executed for a workload and determine a number of sampler units to be enabled based on the estimate.
地址 Santa Clara CA US