发明名称 |
Method of evaluating and method and apparatus for thermally processing semiconductor wafer |
摘要 |
A method of evaluating a semiconductor wafer which can provide an index as to whether slip generation is likely or not can be provided. In-plane temperature distribution of a semiconductor wafer is changed at a prescribed temperature and condition of temperature distribution generating a slip line is detected. In this manner, a range of tolerable thermal stress not generating a slip line is specified. <IMAGE> |
申请公布号 |
EP0798773(A3) |
申请公布日期 |
1998.12.09 |
申请号 |
EP19970104300 |
申请日期 |
1997.03.13 |
申请人 |
SUMITOMO ELECTRIC INDUSTRIES, LTD. |
发明人 |
KIYAMA, MAKOTO |
分类号 |
G01N25/00;C30B33/02;H01L21/324;H01L21/66 |
主分类号 |
G01N25/00 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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