Method, computer system, and apparatus for accessing peripheral component interconnect express endpoint device

摘要

Embodiments of the present invention relate to a peripheral component interconnect express endpoint device accessing method, a computer system, and an apparatus. A state of an access request sent by a processor is monitored, and a simulation response message for the access request is sent to the processor when it is determined that the PCIe endpoint device sends no response message for the access request. Therefore, according to the simulation response message, the processor can confirm completion of the procedure corresponding to the previously sent access request, and shut down a timer for timing the access request and clear the buffered access request, thereby keeping normal processing in the processor and avoiding the MCE resetting problem that arises from accumulation of access requests in the processor.

主权项

1. A computer, comprising:
a processor, configured to obtain an operation instruction for accessing a peripheral component interconnect express (PCIe) endpoint device, and send an access request to the PCIe endpoint device according to the operation instruction; a PCIe bus, configured to connect to the PCIe endpoint device; a simulation response module implemented in a field-programmable gate array (FPGA) and, configured to monitor a state of the access request, wherein the state of the access request comprises finished or unfinished, and if the state of the access request is unfinished when a preset trigger condition is fulfilled, obtain a simulation response message for the access request, and send the simulation response message to the processor; wherein the simulation response module receives the access request sent by the processor, buffers the access request after receiving the access request, monitors whether a response message for the access request is received from the PCIe endpoint device, and if the response message for the access request is received from the PCIe endpoint device, affixes a finished flag to the buffered access request or deletes the buffered access request; and wherein the simulation response module queries the buffered access request when the preset trigger condition is fulfilled, determines that the state of the access request is finished if a flag of the buffered access request is finished or the buffered access request is deleted, and determines that the state of the access request is unfinished if a flag of the buffered access request is unfinished or the buffered access request has no flag indicating the state is finished.