发明名称 Execution model for heterogeneous computing
摘要 The techniques are generally related to implementing a pipeline topology of a data processing algorithm on a graphics processing unit (GPU). A developer may define the pipeline topology in a platform-independent manner. A processor may receive an indication of the pipeline topology and generate instructions that define the platform-dependent manner in which the pipeline topology is to be implemented on the GPU.
申请公布号 US9430807(B2) 申请公布日期 2016.08.30
申请号 US201313777663 申请日期 2013.02.26
申请人 QUALCOMM Incorporated 发明人 Bourd Alexei V.;Torzewski William F.
分类号 G06T1/20;G06F9/45;G06F9/44;G06F9/54 主分类号 G06T1/20
代理机构 Shumaker & Sieffert, P.A. 代理人 Shumaker & Sieffert, P.A.
主权项 1. A method for heterogeneous computing, the method comprising: receiving, with a processor, a pipeline topology of an execution model that defines a data processing algorithm in a platform-independent manner; generating, with the processor, instructions that indicate a platform-dependent manner in which the pipeline topology of the execution model is to be implemented on a graphics processing unit (GPU), wherein the platform-dependent manner in which the pipeline topology of the execution model is to be implemented on the GPU is based on a platform of the GPU, wherein the pipeline topology identifies producer kernels that produce data that is to be consumed by consumer kernels, wherein the instructions are based on an amplification factor, and wherein a maximum amount of data that is to be produced by the producer kernels is based on the amplification factor and an amount of data that the producer kernels will receive; and transmitting, with the processor, the instructions to the GPU.
地址 San Diego CA US