发明名称 Resource access control
摘要 Various embodiments can control access to a computing resource (e.g., a memory resource) by detecting that a high priority activity is accessing the resource and preventing a lower priority activity from accessing the resource. The lower priority activity can be allowed access to the resource after the high priority activity is finished accessing the resource. Various embodiments enable memory operations to be mapped to account for changes in data ordering that can occur when a lower priority activity is suppressed. For example, when an activity requests that data be written to a logical memory region, a mapping is created that maps the logical memory region to a physical memory region. The data can then be written to the physical memory region.
申请公布号 US9367356(B2) 申请公布日期 2016.06.14
申请号 US201012817662 申请日期 2010.06.17
申请人 Microsoft Technology Licensing, LLC 发明人 Allen Brent Charles;Brown Joerg Raymond;Brench Neil A.
分类号 G06F9/46;G06F9/50 主分类号 G06F9/46
代理机构 代理人 Banowsky Jim;Chinagudabha Raghu;Minhas Micky
主权项 1. A method, implemented at a computer system that includes one or more processors and a memory resource, for coordinating access to the memory resource, the method comprising: ascertaining that a high priority activity is accessing the memory resource, and that a lower priority activity concurrently requests access to the memory resource; responsive to said ascertaining, suppressing the lower priority activity by at least caching one or more memory operations of the lower priority activity in a cache memory while the high priority activity accesses the memory resource, rather than writing the one or more memory operations to the memory resource while the high priority activity accesses the memory resource; subsequent to suppressing the lower priority activity, determining that the high priority activity has stopped accessing the memory resource; based at least on determining that the high priority activity has stopped accessing the memory resource, transacting the one or more memory operations from the cache memory to the memory resource; and delaying one or more data writes by the high priority activity to the memory resource until after the one or more memory operations have been transacted from the cache memory to the memory resource.
地址 Redmond WA US