发明名称 Method and apparatus for reducing jitter and improving testability of an oscillator
摘要 An oscillator such as a pulled-crystal oscillator (50) provides low clock jitter by converting a sinusoidal voltage on a crystal's (51) terminals into a digital square wave with a comparator (56). The oscillating frequency of the crystal (51) is pulled by selectively switching in extra capacitance through capacitor digital-to-analog converters (CDACs) (57, 58). The oscillator (50) has built-in testability which allows individual capacitors in the CDACs (57, 58) to be quickly tested for opens. A scan path is connected to the inputs of the CDACs (57, 58) for selecting individual capacitors. A first input terminal of the comparator (56) is precharged before a capacitor under test (171) is connected. A comparison voltage is provided to the second input terminal. The capacitor under test (171) is determined to be functional if, after being connected to the first input terminal of the comparator (56), it discharges the first input terminal to a voltage below the comparison voltage, causing the comparator (56) to switch.
申请公布号 US5511126(A) 申请公布日期 1996.04.23
申请号 US19950376997 申请日期 1995.02.23
申请人 MOTOROLA, INC. 发明人 WESTWICK, ALAN L.
分类号 G01R31/28;H03K3/0231;H03K3/03;(IPC1-7):H03M1/10;H03B5/00 主分类号 G01R31/28
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