发明名称 LOGIC CIRCUIT
摘要 PURPOSE:To correct a pulse count difference longer than the address length of a memory by detecting the pulse count difference between a reference signal and a non-reference signal, correcting the count difference when the difference exceeds a prescribed constant and setting the corrected address. CONSTITUTION:A write processing circuit (WC) 1 writes a reference signal DAI to a memory 4 and the WC3 writes a non-reference signal DBI to a memory 5. A pulse count difference detection circuit 6 detects the count difference of pulses between a reference signal DAO read by a read processing circuit (RC) 2 from the memory 4 with the non-reference signal DBO from the memory 5 and provides the output of an error signal when the detected count difference is larger than a prescribed constant. A pulse count start decision circuit 8 receives an error signal from the circuit 6 to decide the error signal, the start signal of correction count and the operation signal. An address setting means 7 makes the correction of the pulse count difference from the circuit 6 to set the corrected address.
申请公布号 JPH0856150(A) 申请公布日期 1996.02.27
申请号 JP19940208109 申请日期 1994.08.09
申请人 NIPPON STEEL CORP 发明人 MIURA SEIJI
分类号 H03K21/40;(IPC1-7):H03K21/40 主分类号 H03K21/40
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