发明名称 IMAGE PROCESSOR
摘要 PURPOSE:To reduce block distortion which causes a visual disturbance through easy processing without impairing the original information that an image has by making both sides of a block overlapping with each other on a block border surface side when viewed from an observer through sample value exchange processing. CONSTITUTION:A signal similar to the input of a conventional block distortion reducing device is used as the input of a block distortion reducing circuit 49. A composite image signal 50 is delayed by a specific quantity first by using line delay circuits 51 and 52, and a switch 53 selects the delayed signal or undelayed signal to interchange sampled values of two pixels across the border of an upper and a lower block. The output of the switch 53 is delayed by pixel delay circuits 54 and 55 and a switch 56 selects the output signals of the circuits 54 and 55 or the output signal of the switch 53. Thus, the sampled values of two right and left images across the border on the same line are interchanged and a block border detecting circuit 59 detects address information 58 to control the switches 53 and 56.
申请公布号 JPH0856357(A) 申请公布日期 1996.02.27
申请号 JP19940188086 申请日期 1994.08.10
申请人 HITACHI LTD 发明人 NAKAYA YUICHIRO;KIMURA JUNICHI
分类号 H04N5/21;H04N1/41;H04N7/30;(IPC1-7):H04N7/30 主分类号 H04N5/21
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