DYNAMIC MARGIN TUNING FOR CONTROLLING CUSTOM CIRCUITS AND MEMORIES

摘要

Embodiments of a method that may allow for selectively tuning a delay of individual logic paths within a custom circuit or memory are disclosed. Circuitry may be configured to monitor a voltage level of a power supply coupled to the custom circuit or memory. A delay amount of a delay unit within the custom circuit or memory may be changed in response to a determination that the voltage level of the power supply has changed.

主权项

1. An apparatus, comprising:
a first delay unit coupled to a clock signal, wherein the first delay unit is configured to generate a delayed clock signal; a circuit path including a first flip-flop circuit coupled to the clock signal, a second flip-flop circuit coupled to the delayed clock signal, and a second delay unit; and circuitry configured to:
monitor a voltage level of a power supply;adjust a first delay amount of the first delay unit in response to a determination that the voltage level of the power supply has changed; andadjust a second delay amount of the second delay unit in response to the determination that the voltage level of the power supply has change.