发明名称 Integrated III-nitride D-mode HFET with cascoded pair half bridge
摘要 There are disclosed herein various implementations of a group III-V power conversion circuit including a monolithically integrated half bridge having a depletion mode III-Nitride field-effect transistor (FET), and a normally OFF composite cascoded switch including a depletion mode III-Nitride FET and an enhancement mode group IV FET. In one exemplary implementation, the monolithically integrated half bridge includes a high side depletion mode III-Nitride FET having an enable switch coupled in the conduction path of the high side depletion mode III-Nitride FET.
申请公布号 US9406674(B2) 申请公布日期 2016.08.02
申请号 US201414326333 申请日期 2014.07.08
申请人 Infineon Technologies Americas Corp. 发明人 Briere Michael A.
分类号 H01L27/088;H03K17/10;H03K17/22;H03K17/567;H01L27/06;H01L25/07 主分类号 H01L27/088
代理机构 Farjami & Farjami LLP 代理人 Farjami & Farjami LLP
主权项 1. An integrated half bridge circuit including a high side switch and a low side switch, said integrated half bridge circuit comprising: a die including first and second depletion mode III-Nitride field-effect transistors (FETs) integrated thereon; a group IV enhancement mode FET; said group IV enhancement mode FET cascoded with said second depletion mode III-Nitride FET to provide a normally OFF composite cascoded switch as said low side switch; a group IV enhancement mode insulated gate bipolar transistor (IGBT) enable switch being in a conduction path of said high side switch, said group IV enhancement mode IGBT enable switch having an emitter coupled to a switch node of said integrated half bridge circuit and a collector coupled to a load; said group IV enhancement mode IGBT enable switch being configured to prevent shorting across a high voltage rail and a low voltage rail.
地址 El Segundo CA US