发明名称 スナップバッククランプ回路を較正し、動作するためのデバイスおよび方法
摘要 A device includes a snapback clamp circuit configured to clamp a supply voltage in response to the supply voltage exceeding a trigger voltage level. In at least one embodiment, the snapback clamp circuit includes a clamp transistor and a programmable resistance portion that is responsive to a control signal to calibrate the trigger voltage level. Alternatively or in addition, the snapback clamp circuit may include a programmable bias device configured to calibrate the trigger voltage level by biasing a gate terminal of the clamp transistor. In another particular embodiment, a method of calibrating a snapback clamp circuit is disclosed. In another particular embodiment, a method of operating an integrated circuit is disclosed.
申请公布号 JP5973107(B2) 申请公布日期 2016.08.23
申请号 JP20160500714 申请日期 2014.03.06
申请人 クゥアルコム・インコーポレイテッドQUALCOMM INCORPORATED 发明人 スリバスタバ、アンキット;シェンコ、マシュー・デイビッド;ウォーリー、ユージーン・ロバート
分类号 H01L21/822;H01L27/04;H01L27/06;H03G11/00;H03K17/08 主分类号 H01L21/822
代理机构 代理人
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