STRUCTURE AND METHOD TO MITIGATE SOLDERING OFFSET FOR WAFER-LEVEL CHIP SCALE PACKAGE (WLCSP) APPLICATIONS

摘要

The present disclosure relates to a wafer level chip scale package (WLCSP) with a stress absorbing cap substrate. The cap substrate is bonded to a die through a bond ring and a bond pad arranged on an upper surface of the cap substrate. A through substrate via (TSV) extends from the bond pad, through the cap substrate, to a lower surface of the cap substrate. Further, recesses in the upper surface extend around the bond pad and along sidewalls of the bond ring. The recesses absorb induced stress, thereby mitigating any device offset in the die.

主权项

1. A wafer level chip scale package (WLCSP) comprising:
a die; a cap substrate having recesses extending into an upper surface of the cap substrate; one or more bonding elements arranged on the upper surface of the cap substrate at positions surrounded by the recesses, wherein the one or more bonding elements are configured to bond the die to the cap substrate; a through substrate via (TSV) extending through the cap substrate and configured to provide an electrical connection between the die and underlying solder balls disposed below a lower surface of the cap substrate.