| 摘要 |
The circuit comprises a set of nodes or terminals (N1-Nn). For each node there is a corresponding set of non-modifiable circuits (MF1-MFn) for selectively applying one of two supply potentials (Vdd,Gnd), to the configuration nodes. There is also a set of modifiable circuits (MM1-MMn) for modifying the potential applied to the configuration nodes by non-modifiable circuits. The modifiable circuit (MMi) comprises a fusible (Fi), which is in an intact state before configuring, and in a breakdown state after configuring. This is connected so that Gnd potential is applied to the node in the intact state, and Vdd potential is applied to the node in the breakdown state. The two potentials are the ground or earth potential (Gnd), and the positive supply potential (Vdd). The modifiable circuit (MFi) contains several p inverters connected in series, where p is an even number, e.g. p = 2, and a junction (JCi) connecting the node to the output of the pth inverter, or to the output of the qth inverter, where q is an odd number, e.g. q = 1, which is less than p. The fusible (Fi) is connected in series with an interrupter component between terminals receiving the first potential (Gnd) and the second potential (Vdd). The common node is connected to the input of the first inverter (I1i) of the modifiable circuit (MFi). The interrupter component is a MOS transistor (MP1i), with its drain connected to the gate via an inverter (FBi). The MOS transistor (MP1i) forming an interrupter is of p-type, and its source is connected to the supply terminal. Its drain is joined to ground potential (Gnd) via the fusible (Fi). A second MOS transistor of p-type (MP2i) is connected in parallel with the MOS transistor forming an interrupter (MP1i), and receives transitionally a voltage delivered by a Power On Reset (POR) block.
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