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发明名称
绝缘体上半导体装置之制造方法
摘要
本发明提供一种绝缘体上半导体(SOI)装置之制造方法。于一个实施例中,本方法包括提供单晶矽基板,在该基板上覆有单晶矽层,并以电介质层将该基板与该单晶矽层分隔。沈积并图案化闸电极材料以形成闸电极和间隔件。使用该闸电极作为离子植入遮罩而将杂质决定掺杂物离子植入到单晶矽层中,以在该单晶矽层中形成间隔开的源极和汲极区域,以及使用该间隔件作为离子植入遮罩而将该杂质决定掺杂物离子植入到单晶矽基板中,以在该单晶矽基板中形成间隔开的装置区域。然后形成电接触件接触该等间隔开的装置区域。
申请公布号
TW200735263
申请公布日期
2007.09.16
申请号
TW095116200
申请日期
2006.05.08
申请人
高级微装置公司
发明人
佩乐拉
分类号
H01L21/76(2006.01)
主分类号
H01L21/76(2006.01)
代理机构
代理人
洪武雄;陈昭诚
主权项
地址
美国
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