发明名称 |
Methods and devices for synchronizing the timing of logic cards in a packet switching system without data loss |
摘要 |
Synchronous timing techniques provide redundant reference frequencies to enable a packet switching system to continuously generate one or more master clock frequencies when an original reference frequency is lost or unavailable.
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申请公布号 |
US2004184485(A1) |
申请公布日期 |
2004.09.23 |
申请号 |
US20030388438 |
申请日期 |
2003.03.17 |
申请人 |
BRADBURY FRANK;JONES JOHN PATRICK;MACINTYRE DOUGLAS;SCHMIDT RAYMOND;WHITNEY SCOTT |
发明人 |
BRADBURY FRANK;JONES JOHN PATRICK;MACINTYRE DOUGLAS;SCHMIDT RAYMOND;WHITNEY SCOTT |
分类号 |
H04J3/06;(IPC1-7):H04J3/06 |
主分类号 |
H04J3/06 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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