发明名称 Method and system for automated path delay test vector generation from functional tests
摘要 Disclosed herein are methods and systems for generating test vectors for use in verification of a circuit design and for hardware testing on a fabricated circuit representative of the circuit design. The system and methods can systematically and automatically perform functional and structural testing on selected paths of the circuit design and, in turn, generate one or more test vectors to increase PDT test coverage using the results of the structural test on the selected path.
申请公布号 US2008092004(A1) 申请公布日期 2008.04.17
申请号 US20060525659 申请日期 2006.09.22
申请人 SUN MICROSYSTEMS, INC 发明人 WATKINS DANIEL;CHEN LIANG-CHI
分类号 G01R31/28;G06F11/00 主分类号 G01R31/28
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